Fpga Embedded Design Fpgas

Tags: FPGA

Learn FPGA embedded application design starting with the basics and leaving with your own working hardware.

Last updated 2022-01-10 | 4.5

- Build an FPGA embedded solution from the ground up using Altera/Intel FPGAs and software.
- Apply your Verilog knowledge to real applications with FPGAs.

What you'll learn

Build an FPGA embedded solution from the ground up using Altera/Intel FPGAs and software.
Apply your Verilog knowledge to real applications with FPGAs.

* Requirements

* Basic knowledge of Hardware Description languages like Verilog or VHDL is expected.
* You are not required to make any purchases
* but an Altera/Intel DE0-CV board will come in handy if you want to follow along with the examples shown throughout the course.

Description

It's time to get your hands on an actual FPGA!

In this second part of the FPGA Embedded Design series, we'll get our hands on an actual FPGA to bring our designs to life.

We'll use an FPGA development board from Terasic. We'll program a Cyclone V FPGA from Altera/Intel, using their development suite Quartus Prime.

This course consists of two main parts:

  1. Foundations of FPGAs, where we'll cover the essentials of FPGAs, how they work, what they can and cannot do.

  2. Hands-On Training, where we'll design some simple hardware and download it into an FPGA development board. No purchases are required for this second part, but it sure helps to have your own board to follow along, and keep on tinkering in the future with this new superpower.

What are you waiting for? Let's have some fun!!! 

Who this course is for:

  • Anyone who wants to learn FPGA design.
  • Developers curious about FPGA Design.
  • Embedded Engineers who want to learn about FPGAs.
  • This course is not for experienced embedded engineers specialized in FPGAs.

Course content

7 sections • 59 lectures

Course Structure Preview 04:51

Instructor Introduction Preview 00:53

Motivation: Hardware Design Preview 02:52

Motivation: Soft Processors Preview 01:37

Yet Another Motivation: IP Cores Preview 00:51

Intro to FPGAs Preview 01:47

FPGA Overview Preview 01:09

FPGAs vs ASIC Preview 01:08

What's Inside an FPGA? Preview 00:45

What's Inside Logic Blocks? - LookUp Tables Preview 03:10

What's Inside Logic Blocks? Adders and Flip Flops Preview 03:54

What's Inside Interconnects? Preview 02:28

What's Inside I/O Blocks? Preview 01:07

Which is the Programmable Part? Preview 05:07

FPGAs vs CPLDs Preview 02:05

How is an FPGA Programmed? Preview 03:15

Who Makes FPGAs? Preview 01:58

What Hardware can be Implemented with an FPGA? Preview 02:23

Where to Get a Board Preview 02:25

Board Unboxing Preview 02:10

The DE0-CV Board Website Preview 01:49

DE0-CV Board CD Content Preview 04:04

Skimming Through The Manual Preview 05:20

The FPGA Development Process Preview 00:40

The Steps you Need to Take Preview 01:04

Create a Project Preview 02:20

Write your Code Preview 01:25

Assign Pins Preview 04:06

Pin Assignment Demo Preview 02:32

Specify Timing Constraints Preview 05:15

Propagation Delays Example Preview 08:15

Timing in Sequential Systems Preview 04:23

Why This Matters in FPGAs Preview 04:21

Where the Compiler Takes On Preview 03:27

Timing Analysis Preview 01:15

Programming Files Preview 02:15

Installing Quartus Prime Preview 02:28

Showing you Around Quartus Prime Preview 05:49

Installing The DE0-CV Project Template Preview 05:10

First Project Source Code Preview 00:05

Looking at the Top-Level Template Code Preview 02:25

Entering Some Proof-of-Concept Code Preview 01:53

Compiling your Design Preview 03:17

Programming your Device - JTAG Mode Preview 05:21

Programming your Device - Active Serial Mode Preview 03:10

Getting it Back to its Factory State Preview 01:51

System Builder Testing Project Source Code Preview 00:05

If you'd like to try this project, please feel free to download it. It's attached to this lecture as a zip file.

System Builder: The Easiest way to Jumpstart you Applications Preview 03:26

System Description Preview 06:28

Adder Project Source Code Preview 00:05

Looking at the Adder Code Preview 04:46

Looking at the Blinky Code Preview 02:27

Looking at the Instantiated Modules Code Preview 04:29

Programming the Adder Into the Board Preview 02:50

Schematic RTL Demo Preview 04:49

Think of All the Things we Learned Preview 01:24

What's Next? Preview 02:03

Farewell Preview 01:02

Bonus Lecture: LabsLand and more from Closure Labs! Preview 01:04